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ENCT 301Bachelor in Electrical Engineering · Semester 52 Papers Available

Microprocessors

Past examination question papers and complete curriculum syllabus for Microprocessors (ENCT 301), Bachelor in Electrical Engineering Semester 5 under Institute of Engineering (IOE), Tribhuvan University.

Past Question Papers (PDF)

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Note: This question paper file (4th sem) was archived from an IOE exam session for the common Microprocessors curriculum.

4th-sem_Microprocessor.pdf

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Most Frequently Asked Questions

Top recurring IOE board exam questions for Microprocessors with verified mark schemes, formula notation, and recurrence frequency.

Showing 30 of 30 top repeated questions

Introduction

2 Questions
#1Repeated 4 Times[8 Marks]Introduction
Define stored program concept. How Harvard Architecture differs from Von Neumann Architecture? Differentiate between hardwired and microprogrammed control unit.
Appeared in:2082 Kartik2081 Chaitra2076 Bhadra2075 Bhadra
#2Repeated 4 Times[8 Marks]Introduction
Differentiate between microprocessor and microcontroller. Explain fetch and execute cycle using RTL for instruction LXI B, 2050H.
Appeared in:2080 Chaitra2079 Chaitra2078 Chaitra2075 Baisakh

Intel 8085 Microprocessor

9 Questions
#1Repeated 5 Times[8 Marks]Intel 8085 Microprocessor
Draw the internal architecture of Intel 8085 microprocessor and explain each functional block in detail.
Appeared in:2078 Chaitra2076 Bhadra2074 Bhadra2071 Bhadra2064 Shrawan
#2Repeated 5 Times[8 Marks]Intel 8085 Microprocessor
What is addressing mode? Explain all the addressing modes used by Intel 8085 microprocessor with suitable examples.
Appeared in:2082 Kartik2081 Chaitra2079 Chaitra2078 Chaitra2070 Bhadra
#3Repeated 4 Times[8 Marks]Intel 8085 Microprocessor
Write an assembly language program for 8085 to transfer eight-bit numbers from 9010H to 9020H if bit D6 is 1. Otherwise transfer data by exchanging bit D1 and D5. Assume there are ten 8-bit data.
Appeared in:2082 Kartik2080 Chaitra2074 Bhadra2064 Shrawan
#4Repeated 3 Times[8 Marks]Intel 8085 Microprocessor
Draw the bus timing diagram of instruction OUT 01H which is at location 4000H. Also calculate the time required to execute the instruction if clock frequency is 5 MHz.
Appeared in:2080 Chaitra2078 Chaitra2076 Bhadra
#5Repeated 3 Times[8 Marks]Intel 8085 Microprocessor
Explain bus timing diagram. Draw and explain the timing diagram of the 8085 instruction STA 2050H.
Appeared in:2082 Kartik2073 Bhadra2071 Bhadra
#6Repeated 2 Times[8 Marks]Intel 8085 Microprocessor
Draw the functional block diagram of 8085 microprocessor. Explain the functions of Accumulator, ALU, Flag Register, Program Counter, and Stack Pointer.
Appeared in:2082 Kartik2081 Chaitra
#7Repeated 2 Times[8 Marks]Intel 8085 Microprocessor
Draw and explain the timing diagram of opcode fetch machine cycle and memory read machine cycle for `MOV A, M` or `MVI A, 32H` in 8085.
Appeared in:2082 Kartik2080 Chaitra
#8Repeated 2 Times[8 Marks]Intel 8085 Microprocessor
Write an 8085 assembly language program to sort an array of 10 eight-bit numbers stored in consecutive memory locations starting from $2050\text{H}$ in ascending order using Bubble Sort.
Appeared in:2082 Shrawan2081 Chaitra
#9Repeated 2 Times[6 Marks]Intel 8085 Microprocessor
Write an 8085 assembly program to find the largest number from an array of $N$ numbers and calculate a lookup table for BCD to Seven Segment code conversion.
Appeared in:2081 Chaitra2079 Chaitra

Intel 8086 Microprocessor

7 Questions
#1Repeated 6 Times[8 Marks]Intel 8086 Microprocessor
Draw the internal architecture of Intel 8086 microprocessor. Explain the functions of Bus Interface Unit (BIU) and Execution Unit (EU). How is pipelining implemented in 8086?
Appeared in:2082 Kartik2081 Chaitra2080 Chaitra2076 Baisakh2074 Bhadra2071 Bhadra
#2Repeated 4 Times[8 Marks]Intel 8086 Microprocessor
Write an assembly language program in 8086 to read a string from user, convert uppercase characters to lowercase and vice versa, and display each word in a new line.
Appeared in:2082 Kartik2076 Baisakh2071 Bhadra2070 Bhadra
#3Repeated 3 Times[6 Marks]Intel 8086 Microprocessor
Explain how segmented memory is implemented in Intel 8086 microprocessor. Calculate the physical address if CS = 2400H and IP = 3500H.
Appeared in:2081 Chaitra2077 Chaitra2075 Bhadra
#4Repeated 2 Times[8 Marks]Intel 8086 Microprocessor
Draw the functional block diagram of 8086 microprocessor. Explain the role of Bus Interface Unit (BIU) and Execution Unit (EU), and how instruction pipelining is implemented in 8086.
Appeared in:2082 Kartik2081 Chaitra
#5Repeated 2 Times[6 Marks]Intel 8086 Microprocessor
Explain physical address generation in 8086 segmented memory architecture. If $\text{CS} = 348A\text{H}$ and $\text{IP} = 4214\text{H}$, calculate the 20-bit physical address of the next instruction.
Appeared in:2082 Kartik2080 Chaitra
#6Repeated 2 Times[8 Marks]Intel 8086 Microprocessor
Explain minimum mode and maximum mode configurations of 8086 microprocessor. Draw the pin functions for both modes and explain how bus control signals are generated in maximum mode using 8288 Bus Controller.
Appeared in:2081 Chaitra2079 Baishakh
#7Repeated 2 Times[6 Marks]Intel 8086 Microprocessor
Explain the addressing modes of 8086 with examples: Based Indexed, Relative Based Indexed, and Register Indirect.
Appeared in:2082 Shrawan2078 Bhadra

Microprocessor System

5 Questions
#1Repeated 4 Times[8 Marks]Microprocessor System
Design an interfacing circuit for 8085 using 3:8 decoder for a 4 KB ROM and 2 KB RAM starting at address C000H in consecutive addresses as far as possible. Explain your circuit.
Appeared in:2081 Chaitra2076 Bhadra2071 Bhadra2068 Bhadra
#2Repeated 3 Times[8 Marks]Microprocessor System
Explain parallel interface and its modes of operation. Briefly explain the functional block diagram and operating modes of 8255 Programmable Peripheral Interface (PPI).
Appeared in:2081 Chaitra2076 Bhadra2074 Bhadra
#3Repeated 2 Times[8 Marks]Microprocessor System
Design an 8085 microprocessor memory interface system with $4\text{ KB}$ EPROM (using $2732$) and $8\text{ KB}$ SRAM (using two $6232$ chips). Show the memory map and complete address decoding logic using 74LS138 decoder.
Appeared in:2082 Kartik2081 Chaitra
#4Repeated 2 Times[6 Marks]Microprocessor System
Explain Isolated (Direct) I/O versus Memory Mapped I/O in 8085 microprocessor with their relative advantages and disadvantages.
Appeared in:2082 Kartik2080 Chaitra
#5Repeated 2 Times[8 Marks]Microprocessor System
Draw the functional block diagram of 8255 Programmable Peripheral Interface (PPI). Explain its various operational modes (Mode 0, Mode 1, Mode 2) and BSR mode.
Appeared in:2081 Chaitra2079 Chaitra

Interrupt Operations

4 Questions
#1Repeated 4 Times[8 Marks]Interrupt Operations
Describe Polled Interrupt and Chained Interrupt. Explain the interrupt processing cycle of 8085 microprocessor.
Appeared in:2080 Chaitra2077 Chaitra2075 Bhadra2074 Bhadra
#2Repeated 4 Times[8 Marks]Interrupt Operations
Explain SIM and RIM instructions in 8085. Explain how different hardware interrupt pins (TRAP, RST 7.5, RST 6.5, RST 5.5, INTR) are handled specifying their priorities and vector addresses.
Appeared in:2082 Kartik2076 Bhadra2074 Bhadra2070 Bhadra
#3Repeated 2 Times[8 Marks]Interrupt Operations
Explain hardware interrupts of 8085 (TRAP, RST 7.5, RST 6.5, RST 5.5, INTR) with priority order, triggering mechanism (edge/level), and vector addresses. Explain SIM and RIM instructions.
Appeared in:2082 Kartik2081 Chaitra
#4Repeated 2 Times[8 Marks]Interrupt Operations
Explain the interrupt processing sequence in 8086 microprocessor. What are dedicated/predefined interrupts (Type 0 to Type 4) and Interrupt Vector Table (IVT) structure?
Appeared in:2082 Kartik2080 Chaitra

Advanced Topics

3 Questions
#1Repeated 4 Times[8 Marks]Advanced Topics
Discuss about Flynn's Classification. Write the differences between RISC and CISC computers.
Appeared in:2080 Chaitra2077 Chaitra2074 Bhadra2072 Ashwin
#2Repeated 4 Times[8 Marks]Advanced Topics
Write short notes on: (a) RS-232 serial communication standard, (b) Direct Memory Access (DMA) data transfer.
Appeared in:2081 Chaitra2079 Chaitra2075 Bhadra2066 Magh
#3Repeated 2 Times[8 Marks]Advanced Topics
Explain Direct Memory Access (DMA) data transfer. Draw the internal architecture of 8237/8257 DMA controller and explain how bus hold request (HOLD) and hold acknowledge (HLDA) handshake works.
Appeared in:2081 Chaitra2078 Bhadra

Curriculum Syllabus & Course Topics

Sourced from TU curriculum portal
Full Syllabus (PDF)
Chapter-wise Units & Micro-Syllabus Topics (6 Units)

  1. 1. Introduction

    • 1.1Introduction to microprocessors
    • 1.2History of microprocessors
    • 1.3Basic block diagram of a digital computer
    • 1.4Microcomputer and microcontroller
    • 1.5Bus organization of computer system
    • 1.6Stored program concept (Von Neumann’s architecture)
    • 1.7Processing cycle of a stored program computer

  2. 2. Intel 8085 Microprocessor

    • 2.1Features of 8085
    • 2.2Internal architecture of 8085
    • 2.3Pin configurations of 8085
    • 2.4Instruction format and data format
    • 2.5Addressing modes of 8085
    • 2.6Instruction set of 8085
    • 2.7Various programs in 8085
    • 2.7.1Simple programs with arithmetic and logical operations
    • 2.7.2Conditions and loops
    • 2.7.3Array and table processing
    • 2.7.4Decimal - BCD conversion
    • 2.7.5Multiplication and division
    • 2.8Instruction cycle, machine cycle and T-cycle
    • 2.9Timing diagrams of bus operations

  3. 3. Intel 8086 Microprocessor

    • 3.1Features of 8086
    • 3.2Internal architecture of 8086
    • 3.2.1BIU and components
    • 3.2.2EU and components
    • 3.2.3EU and BIU operations
    • 3.3Segment and offset address
    • 3.4Pin configurations of 8086
    • 3.5Addressing modes of 8086
    • 3.6Assembly language programming
    • 3.7High level versus low level programming
    • 3.8Assembly language syntax
    • 3.8.1Comments
    • 3.8.2Reserved words
    • 3.8.3Identifiers
    • 3.8.4Statements
    • 3.8.5Directives
    • 3.8.6Operators
    • 3.8.7Instructions
    • 3.9EXE and COM programs
    • 3.10Assembling, linking and execution
    • 3.11One pass and two pass assemblers
    • 3.12Interrupt services: INT 21H and INT 10H
    • 3.13Various programs in 8086
    • 3.13.1Simple programs for arithmetic, logical, string and input/output
    • 3.13.2Conditions and loops
    • 3.13.3Array and string processing
    • 3.13.4ASCII and decimal numbers operation
    • 3.13.5Displaying numbers in decimal, binary and hexadecimal formats

  4. 4. Microprocessor System

    • 4.1Memory classifications and hierarchy
    • 4.2Interfacing I/O devices and memory with 8085
    • 4.2.1Address decoding
    • 4.2.2Unique and non-unique address decoding
    • 4.2.3I/O mapped I/O and memory mapped I/O
    • 4.2.4I/O address decoding with NAND and block decoders
    • 4.2.5Memory address decoding
    • 4.3Parallel Interface
    • 4.3.1Modes: Simple, wait, single handshaking and double handshaking
    • 4.3.2Introduction to programmable peripheral interface (PPI)
    • 4.4Serial Interface
    • 4.4.1Synchronous and asynchronous transmission
    • 4.4.2Serial interface standards: RS232, USB
    • 4.4.3Introduction to USART

  5. 5. Interrupt Operations

    • 5.1Interrupt and its importance
    • 5.2Polling vs interrupt
    • 5.3Types of interrupts
    • 5.4Interrupts in 8085 and interrupt instructions
    • 5.5Interrupt service routine
    • 5.6Interrupt processing in 8085
    • 5.7Using programmable interrupt controllers (PIC)
    • 5.8Interrupt in 8086 and interrupt vector table
    • 5.9Interrupt processing in 8086

  6. 6. Advanced Topics

    • 6.1Harvard architecture
    • 6.2Accumulator based and register based architecture
    • 6.3Hardwired and microprogrammed control unit
    • 6.4RISC and CISC
    • 6.5Introduction to multiprocessing/multitasking
    • 6.6Digital signal processor

Examination Scheme & Marks Distribution

Evaluation Structure

  • Final Board Theory Exam: 60 Marks (Pass mark: 24)
  • Internal Assessment: 40 Marks (Pass mark: 16)
  • Practical / Lab Exam: 25 or 50 Marks (Continuous lab evaluation + viva, where applicable)

* This is the general current IOE 60/40 scheme; verify course-specific details in the syllabus above.

Exam Preparation Guidelines

  • Review the 2 available past examination papers to identify recurring patterns, core problem types, and chapter weightage.
  • Cross-reference key answers with official syllabus units, standard textbooks, and lecture notes.
  • Structure answers with labeled diagrams, concise bullet points, and highlight final answers in numerical solutions.

Frequently Asked Questions (Microprocessors)

Q: How can I download Microprocessors past question papers?

You can preview or download the Microprocessors question papers (PDF) directly using the built-in viewer on this page with zero redirects or paywalls.

Q: What is the pass mark for Microprocessors?

The general current scheme is a 60-mark final theory exam and a 40-mark internal assessment, with pass marks of 24 and 16. Verify the course-specific syllabus above.

Q: Where can I find the complete syllabus for this subject?

The available chapter-wise syllabus and topic breakdown is indexed in the Syllabus section above, with links to the curriculum PDF source.

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